AUSTIN, Texas — Aiming to move test to the register-transfer level, engineer Nikhil Dakwala is preparing a tool that he calls the industry's first memory RTL-to-automatic test pattern generation (ATPG ...

Integrated circuit complexity and integration continuously advances, posing challenges to the development process. Market profitability, however, demands that products be designed and produced as fast ...

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...

Semiconductor companies are racing to develop AI-specific chips to meet the rapidly growing compute requirements for artificial intelligence (AI) systems. AI chips from companies like Graphcore and ...

Modern SoCs are experiencing continued growth in capabilities and design sizes with more and more subsystem IPs being implemented. These large, complex, multi-core SoCs need strategies for DFT and ...